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Digital Design and Computer Architecture

Paperback Engels 2012 9780123944245
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'Digital Design and Computer Architecture' is designed for courses that combine digital logic design with computer organization/architecture or that teach these subjects as a two-course sequence. 'Digital Design and Computer Architecture' begins with a modern approach by rigorously covering the fundamentals of digital logic design and then introducing Hardware Description Languages (HDLs).

Featuring examples of the two most widely-used HDLs, VHDL and Verilog, the first half of the text prepares the reader for what follows in the second: the design of a MIPS Processor. By the end of Digital Design and Computer Architecture, readers will be able to build their own microprocessor and will have a top-to-bottom understanding of how it works-even if they have no formal background in design or architecture beyond an introductory class. David Harris and Sarah Harris combine an engaging and humorous writing style with an updated and hands-on approach to digital design.

Content Highlights
- Covers the fundamentals if digital logic design and reinforces logic concepts through the design of a MIPS microprocessor
- Features side-by-side examples of the two most prominent Hardware Description Languages (HDLs)-Verilog and VHDL-which illustrate and compare the ways each can be used in the design of digital systems
- Includes examples throughout the text that enhance the reader's understanding and retention of key concepts and techniques
- Companion Web site includes links to CAD tools for FPGA design Simplicity and Xilinx, lecture slides, laboratory projects, and solutions to exercises


Aantal pagina's:720
Hoofdrubriek:IT-management / ICT


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1. From Zero to One
1.1 The Game Plan
1.2 The Art of Managing Complexity
1.3 The Digital Abstraction
1.4 Number Systems
1.5 Logic Gates
1.6 Beneath the Digital Abstraction
1.7 * CMOS Transistors
1.8 * Power Consumption
1.9 Summary and A Look Ahead

2. Combinational Logic Design
2.1 Introduction
2.2 Boolean Equations
2.3 Boolean Algebra
2.4 From Logic to Gates
2.5 Multilevel Combinational Logic
2.6 X's and Z's, Oh My
2.7 Karnaugh Maps
2.8 Combinational Building Blocks
2.9 Timing
2.10 Summary

3. Sequential Logic Design
3.1 Introduction
3.2 Latches and Flip-Flops
3.3 Synchronous Logic Design
3.4 Finite State Machines
3.5 Timing of Sequential Logic
3.6 Parallelism
3.7 Summary

4. Hardware Description Languages
4.1 Introduction
4.2 Combinational Logic
4.3 Structural Modeling
4.4 Sequential Logic
4.5 More Combinational Logic
4.6 Finite State Machines
4.7 Data Types
4.8 Parameterized Modules
4.9 Testbenches
4.10 Summary

5. Digital Building Blocks
5.1 Introduction
5.2 Arithmetic Circuits
5.3 Number Systems
5.4 Sequential Building Blocks
5.5 Memory Arrays
5.6 Logic Arrays
5.7 Summary

6. Architecture
6.1 Introduction
6.2 Assembly Language
6.3 Machine Language
6.4 Programming
6.5 Addressing Modes
6.6 Lights, Camera, Action: Compiling, Assembling, and Loading
6.7 Odds and Ends
6.8 Real World Perspective: x86 Architecture
6.9 Summary

7. Microarchitecture
7.1 Introduction
7.2 Performance Analysis
7.3 Single-Cycle Processor
7.4 Multicycle Processor
7.5 Pipelined Processor
7.6 HDL Representation
7.7 Exceptions
7.8 Advanced Microarchitecture
7.9 Real World Perspective: IA-32 Microarchitecture
7.10 Summary

8. Memory and I/O Systems
8.1 Introduction
8.2 Memory System Performance Analysis
8.3 Caches
8.4 Virtual Memory
8.5 I/O Inroduction
8.6 Embedded I/O Systems
8.7 PC I/O Systems
8.8 Real0-World Perspective: x86 Memory and I/O Systems
8.9 Summary

Appendix A Digital System Implementation
A.1 Introduction
A.2 74xx Logic
A.3 Programmable Logic
A.4 Application-Specific Integrated Circuits
A.5 Data Sheets
A.6 Logic Families
A.7 Packaging and Assembly
A.8 Transmission lines
A.9 Economics

Appendix B MIPS Instructions

Appendix C: C Programming
C.1 Introduction
C.2 Welcome to C
C.3 Compilation
C.4 Variables
C.5 Operators
C.6 Function Calls
C.7 Control-Flow Statements
C.8 More Data Types
C.9 Standard Libraries
C.10 Compiter and Commands Line Operations
C.11 Common Mistakea

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